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silicon link inc. 1 march 2010 rev. 2 www.silicon - link.com MC34063D dc/dc converter control circuits description the mc34063 d is a monolithic control circuit containing the primary functions required for dc -to - dc converter. this device consist of an internal temperature compensated reference, comparator, controlled duty cycle oscillator with an act ive current limit circuit, driver and high current output switch. employing a minimum number of external components , the MC34063D is designed for step - down , step - up and voltage- inverting applications. pin configuration ? top view ordering information mc34063 d d8 13 features operation from 3v to 40v active current limiting low quiescent current: 3ma output switch current in excess of 1.5a adjustable output voltage frequency operation to 100 khz 2% reference accuracy circuit type: dc/ dc converter control circuits package style : d8 = soic/8l n8 = pdip/8l packaging option: t = tube 13 = tape and reel (13? reel dia) 1 2 3 4 8 7 6 5 8l soic driver collector i pk sense v cc comparator inverting input gnd switch collector switch emitter timing capacitor package top mark ing : (for 8l soic /pdip ) line 1: device line 2: lot no. code f ? foundry code (g) ymxxx ? 5 character lot no. s ? split code line 3: date code g ? assembly vendor code yy ? year ww ? workweek mc34063 fymxxxs gyyww 8l pdip 1 2 3 4 8 7 6 5 driver collector i pk sense v cc comparator inverting input gnd switch collector switch emitter timing capacitor
silicon link inc. 2 march 2010 rev. 2 www.silicon - link.com MC34063D dc/dc converter control circuits absolute maximum ratings parameter symbol value unit supply voltage v cc 40 v comparator input voltage range v ir - 0.3 ~ +40 v switch collector volta ge v c(sw) 40 v switch emitter voltage v swe 40 v switch collector to emitter voltage v ce 40 v driver collector voltage v c(dr) 40 v switch current i sw 1.5 a tamb=25c 8l pdip p d 1.25 w power dissipation 8l soic 0.625 operating ambient temperature ra nge t opr - 40 to +85 c storage temperature range t stg - 65 to +150 c operating junction temperature t opj 120 c electrical characteristics (v cc = 5v, ta = 25 c , unless otherwise specified) parameter symbol test conditions min typ max unit oscillator charging current i chg vcc=5~40v, t a =25c 24 33 42 a discharge current i dischg vcc=5~40v, t a =25c 140 200 260 a voltage amplitude v osc t a =25c - 0.6 - v discharge to charge current ratio k v pin7 =v cc , t a =25c 5.2 6.0 7.5 current limit sense volt age v ipk i dischg =i chg , t a =25c 250 300 350 mv output switch saturation voltage darlington connection v ce(sat)1 i sw =1.0a,v c(sw) =v c(dr) - 1.0 1.3 v saturation voltage v ce(sat)2 i sw =1.0a, i c(dr) =50ma 0.4 0.7 v dc current gain h fe i sw =1.0a, v ce =5.0v 3 5 150 - collector off - state current i cc(off) v ce =40v, t a =25c - 10 100 na comparator threshold voltage v fb 1.227 1.250 1.273 v threshold voltage line regulation ? v fb v cc =5~40v - 1.5 6 mv input bias current i ib v in =0 - 40 400 na total device supply current i cc v cc =5~40v,v pin7 =v cc v pin5 >v fb , ct =0.001f pin7=gnd remaining pins open - 3 4 ma
silicon link inc. 3 march 2010 rev. 2 www.silicon - link.com MC34063D dc/dc converter control circuits application information v sat saturation voltage of the outpu t switch; t on output switch on time; t off output switch off time; v f forward voltage drop of the output rectifier; f (min) minimum desired output switching frequency at the selected values for vin and iout. calculation step - down step - up voltage - inverting t on t off v out + v f v in(min) ? v sat ? v out v out + v f ? v in(min) v in(min) ? v sat |v out | + v f v in(max) ? v sat (t on + t off )max 1/f min 1/f min 1/f min c t 4 x 10 - 5 t on 4 x 10 - 5 t on 4 x 10 - 5 t on i c(sw) 2 x i out(max) 2 x i out(max) (t on + t off )/t off 2 x i ou t(max) (t on + t off )/t off r s 0.3/i c(sw) 0.3/i c(sw) 0.3/i c(sw) l (min) v in(min) ? v sat x t on(max) i pk(sw) v in(min) ? v sat x t on(max) i pk(sw) v in(min) ? v sat x t o n(max) i pk(sw) c o i pk(sw) x (t on + t off ) 8 x v ripple(p - p) i out x t on v ripple(p - p) i out x t on v ripple(p - p) block diagram
silicon link inc. 4 march 2010 rev. 2 www.silicon - link.com MC34063D dc/dc converter control circuits step - up converter step - down converter
silicon link inc. 5 march 2010 rev. 2 www.silicon - link.com MC34063D dc/dc converter control circuits voltage inverting converter step - up with external npn switch
silicon link inc. 6 march 2010 rev. 2 www.silicon - link.com MC34063D dc/dc converter control circuits step - down with external npn switch step - down with external pnp switch
silicon link inc. 7 march 2010 rev. 2 www.silicon - link.com MC34063D dc/dc converter control circuits dual output voltage
silicon link inc. 8 march 2010 rev. 2 www.silicon - link.com MC34063D dc/dc converter control circuits 8l - soic package dimension dimension in inches dimension in mm sym min nom max min nom max a 0.059 0.062 0.065 1.50 1.57 1.65 a1 0.004 0.008 0.010 0.10 0.20 0.25 a2 0.051 0.054 0.057 1.30 1.37 1.45 b 0.013 0.016 0.020 0.33 0.41 0.51 c 0.007 0.008 0.010 0.18 0.20 0.25 d 0.191 0.193 0.195 4.85 4.90 4.95 e1 0.151 0.153 0.155 3.84 3.89 3.94 e 0.228 0.234 0.240 5.79 5.94 6.10 e 0.050 1.27 l 0.020 0.024 0.032 0.51 0. 61 0.81 l1 0.039 0.041 0.043 0.99 1.04 1.09 ? 0* - b* 0* - b* h 0.011 0.015 0.019 0.28 0.38 0.48 8 - lead soic plastic surface mounted package sli package code: d8 note s: 1. dimension d does not include mold flash, protrusions or gate burrs. dimension e1 does not include interlead flash or protrusions. 2. coplanarity applies to the terminals. coplanarity shall not exceed 0.003? [0.08 mm]. 3. based from jedec ns - 012 variation aa.
silicon link inc. 9 march 2010 rev. 2 www.silicon - link.com MC34063D dc/dc converter control circuits 8l - pdip package dimension symbol inches min m ax nominal tolerance a ?0.031x 0pt0.015 b r 0.030 c 0.045 d 0.250 e 0.370 0.005 f 0.060 g 0.060 h 0.060 0.002 i 0.020 j 0.0375 k 0.16 0.022 0.019 0.003 l 0.100 m 0.145 0.155 0.150 0.005 n 0.300 o 0.30 0 p 0.030 q 0.320 0.380 0.350 0.03 r 3 s 5 t 0.130 8 - lead pdip plastic sli package code: n8
silicon link inc. 10 march 2010 rev. 2 www.silicon - link.com MC34063D dc/dc converter control circuits package mechanical drawing surface mountable tape & reel specifications in mm (inch) (soic) - - - - - - - - - - - - - - - - - - - - user direction of feed tape size (w) d e p0 t (max) a0, b0, k0 t1 (max) constant dimensions 8, 12, 16, 24mm 1.550.05 (.061.002) 1.750.10 (.069.004) 4.00.10 (.157.004) 0.400 (.016) see note 0.100 (.004) tape size (w) b1 max. d1 min. f k max. p2 8 mm 4.2 (.165) 1.0 (.039) 3.50.05 (.138 .002) 2.4 (.094) 2.0.05 12 mm 8.2 (.323) 1.5 (.059) 5.50.05 (.217.002) 4.5 (.177) .079.002 variable dimensions per package requirement components tape width (w) mm cavity pitch (p) mm device s per reel 7? reel 13? reel soic 8l 12 8 - 2500 note: ao bo ko are determined by component size. the clearance between the component and the cavity must be within 0.05 [.002] min. to 0.50 [.020] max. for 8mm tape, 0.05 [.002] min to 0.65 [.026] max for 12mm tape.
silicon link inc. 11 march 2010 rev. 2 www.silicon - link.com MC34063D dc/dc converter control circuits reel dimensions tape size a max. b min. c d* min. n min. g t max. 8mm 330 (12.992) 1.5 (.059) 13.0 0.20 (.152 .008) 20.2 (.795) 50 (1.973) 8.4 1.5 0.0 (.331 .059) 0.0 14.4 (.567) 12mm 330 (12.992) 1.5 (.059) 13.0 0.20 (.152 .008) 20.2 (.795) 50 (1.973) 12.4 2.0 0.0 (.488 .078) 0.0 14.4 (.567) mechanical polarization soic - 8l device user direction of feed - - - - - - - - - - - - - - - - - - - -

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